AI hardware
GPUs, TPUs, neuromorphic chips.
16 milestones used this technique.
UMass Amherst researchers demonstrate protein-nanowire memristors for neuromorphic computing
In June 2021, researchers at the University of Massachusetts Amherst published findings in Nature Communications showing that protein nanowires harvested from the bacterium Geobacter sulfurreducens can function as memristors, enabling brain-inspired computation at ultralow power without a conventional battery.
Cornell University researchers demonstrate electrically actuated microscale origami robots with onboard CMOS control
On 17 March 2021, researchers at Cornell University published a demonstration of self-folding microscale robots, roughly 100–250 microns in size, driven by platinum-based shape-memory actuators and controlled by onboard complementary metal-oxide-semiconductor (CMOS) circuits, enabling untethered, electrically commanded origami-style locomotion at the micron scale.
Google Announces TPU v4 Tensor Processing Unit
Google announced its fourth-generation Tensor Processing Unit (TPU v4) at Google I/O in 2021. The chip, designed specifically for large-scale machine-learning workloads, offered substantially higher performance than its predecessor and was made available to researchers via Google Cloud.
Swinburne University of Technology Researchers Demonstrate Optical Neuromorphic Processor Using Micro-Comb Photonic Chip
In January 2021, a Swinburne University of Technology-led international team published results in Nature demonstrating an optical neuromorphic processor built on a photonic micro-comb chip, achieving a processing speed of 10 TOPS from a single integrated device and performing image classification tasks at high speed.
Analogue resistive memory circuit solves linear algebra problems in one step
In March 2019, Daniele Ielmini and colleagues at Politecnico di Milano published results in PNAS demonstrating a crosspoint resistive-memory circuit that solves linear systems, matrix eigenvector problems, and differential equations by physical analogue relaxation, substantially reducing the energy and latency costs of conventional iterative digital solvers.
Movidius (Intel) Launches Neural Compute Stick
In July 2017, Movidius, an Intel subsidiary, released the Movidius Neural Compute Stick, a USB-form-factor device housing the Myriad 2 Vision Processing Unit, enabling developers to run inference from trained deep neural networks on low-power edge hardware without a remote server.
FAISS: Facebook AI Research Library for Efficient Similarity Search
In 2017, Jeff Johnson, Matthijs Douze, and Hervé Jégou at Facebook AI Research published FAISS (Facebook AI Similarity Search), a library enabling efficient nearest-neighbour search across datasets of billions of vectors, with GPU acceleration substantially reducing search time compared to prior methods.
IBM TrueNorth: a neuromorphic integrated circuit with one million programmable neurons
In August 2014, researchers at IBM Research published a description of TrueNorth, a neuromorphic chip containing one million programmable spiking neurons and 256 million synapses on a 4096-core CMOS integrated circuit, built under the DARPA SyNAPSE programme.
AlexNet and Deep Convolutional Neural Networks in Large-Scale Image Classification
In September 2012, Alex Krizhevsky, Ilya Sutskever and Geoffrey Hinton at the University of Toronto submitted a paper describing AlexNet, a deep convolutional neural network that achieved a top-5 error rate of 15.3% on the ImageNet Large Scale Visual Recognition Challenge, outperforming the next-best entry by more than 10 percentage points.
IBM Simulates 4.5 Percent of Human Brain Activity Using Blue Gene Supercomputer
In November 2011, IBM researchers led by Dharmendra Modha at IBM Research Almaden demonstrated a cortical simulation on the Blue Gene/P supercomputer that modelled approximately 4.5 percent of human-scale neural activity, using 147,456 processors to represent 1.617 billion neurons and 8.87 trillion synapses.
D-Wave Systems Announces D-Wave One, a 128-Qubit Quantum Annealing Computer Available for Commercial Purchase
In May 2011, D-Wave Systems announced the D-Wave One, a 128-qubit quantum annealing processor codenamed Rainier, marketed as the first commercially available quantum computer. Lockheed Martin purchased a system for approximately US $10 million, making it the first known commercial transaction for a quantum computing system.
Electronic Skin with Pressure Sensing Developed at University of Tokyo
In December 2008, Takao Someya and colleagues at the University of Tokyo published research in Nature Materials describing a flexible electronic skin using carbon nanotube composite films, enabling large-area pressure sensing suitable for robotic tactile feedback and wearable physiological monitoring.
Silicon Retina with Ganglion Cell Spiking Outputs as Neural Prosthesis
Around 2006, researchers developed a silicon retina implemented as an analogue VLSI chip that modelled four primary retinal ganglion cell types and generated 3,600 spiking outputs, designed as a neural prosthesis matched to the physical dimensions of the biological retina.
NVIDIA GeForce 256: Introduction of the Graphics Processing Unit (GPU)
In 1999, NVIDIA released the GeForce 256, which the company marketed as the first graphics processing unit (GPU), a single-chip processor capable of performing transform, lighting, clipping, and rendering operations that had previously required the host CPU, enabling sustained high-throughput parallel computation.
W. Daniel Hillis Proposes the Connection Machine Architecture
In 1985, W. Daniel Hillis of MIT and Thinking Machines Corporation completed his doctoral dissertation introducing the Connection Machine, a massively parallel architecture connecting 65,536 single-bit processors to accelerate symbolic and artificial-intelligence computation, realised as the CM-1 system.
Commercial Lisp Machine Market: Symbolics and LMI
From 1980 onwards, Symbolics Inc. and Lisp Machines Inc. (LMI), both founded as spin-offs from the MIT Artificial Intelligence Laboratory, commercialised dedicated hardware workstations designed to run Lisp natively, offering large address spaces, garbage collection in hardware, and early graphical interfaces tailored to AI development.